A 32-bit energy efficient exact Dadda multiplier


Conference paper


Saurav Chanda, Koushik Guha, Santu Patra, Anupam Karmakar, Loukrakpam Merin Singh, Krishna Lal Baishnab
2019 IEEE 5th International Conference for Convergence in Technology (I2CT), IEEE, 2019, pp. 1--4

Cite

Cite

APA   Click to copy
Chanda, S., Guha, K., Patra, S., Karmakar, A., Singh, L. M., & Baishnab, K. L. (2019). A 32-bit energy efficient exact Dadda multiplier. In 2019 IEEE 5th International Conference for Convergence in Technology (I2CT) (pp. 1–4). IEEE.


Chicago/Turabian   Click to copy
Chanda, Saurav, Koushik Guha, Santu Patra, Anupam Karmakar, Loukrakpam Merin Singh, and Krishna Lal Baishnab. “A 32-Bit Energy Efficient Exact Dadda Multiplier.” In 2019 IEEE 5th International Conference for Convergence in Technology (I2CT), 1–4. IEEE, 2019.


MLA   Click to copy
Chanda, Saurav, et al. “A 32-Bit Energy Efficient Exact Dadda Multiplier.” 2019 IEEE 5th International Conference for Convergence in Technology (I2CT), IEEE, 2019, pp. 1–4.


BibTeX   Click to copy

@inproceedings{chanda2019a,
  title = {A 32-bit energy efficient exact Dadda multiplier},
  year = {2019},
  organization = {IEEE},
  pages = {1--4},
  author = {Chanda, Saurav and Guha, Koushik and Patra, Santu and Karmakar, Anupam and Singh, Loukrakpam Merin and Baishnab, Krishna Lal},
  booktitle = {2019 IEEE 5th International Conference for Convergence in Technology (I2CT)}
}