APA   Click to copy
Loukrakpam, M., & Choudhury, M. (2020). Error-aware design procedure to implement hardware-efficient logarithmic circuits. IEEE Transactions on Circuits and Systems II: Express Briefs, 67, 851–855.

Chicago/Turabian   Click to copy
Loukrakpam, Merin, and Madhuchhanda Choudhury. “Error-Aware Design Procedure to Implement Hardware-Efficient Logarithmic Circuits.” IEEE Transactions on Circuits and Systems II: Express Briefs 67 (2020): 851–855.

MLA   Click to copy
Loukrakpam, Merin, and Madhuchhanda Choudhury. “Error-Aware Design Procedure to Implement Hardware-Efficient Logarithmic Circuits.” IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 67, IEEE, 2020, pp. 851–55.

@article{loukrakpam2020a,
  title = {Error-aware design procedure to implement hardware-efficient logarithmic circuits},
  year = {2020},
  journal = {IEEE Transactions on Circuits and Systems II: Express Briefs},
  pages = {851--855},
  publisher = {IEEE},
  volume = {67},
  author = {Loukrakpam, Merin and Choudhury, Madhuchhanda}
}