APA   Click to copy
Loukrakpam, M., & Choudhury, M. (2019). Error-aware design procedure to implement hardware-efficient antilogarithmic converters. Circuits, Systems, and Signal Processing, 38, 4266–4279.

Chicago/Turabian   Click to copy
Loukrakpam, Merin, and Madhuchhanda Choudhury. “Error-Aware Design Procedure to Implement Hardware-Efficient Antilogarithmic Converters.” Circuits, Systems, and Signal Processing 38 (2019): 4266–4279.

MLA   Click to copy
Loukrakpam, Merin, and Madhuchhanda Choudhury. “Error-Aware Design Procedure to Implement Hardware-Efficient Antilogarithmic Converters.” Circuits, Systems, and Signal Processing, vol. 38, Springer US New York, 2019, pp. 4266–79.

@article{loukrakpam2019a,
  title = {Error-aware design procedure to implement hardware-efficient antilogarithmic converters},
  year = {2019},
  journal = {Circuits, Systems, and Signal Processing},
  pages = {4266--4279},
  publisher = {Springer US New York},
  volume = {38},
  author = {Loukrakpam, Merin and Choudhury, Madhuchhanda}
}